In this article we will review what A/D converter (ADC) is and what are major types in use today, describing each with enough detail that you will:
- See the basic technology of each type of ADC
- Learn about the key ADC features and capabilities
- Understand which ADC types work best for today’s applications
- Find out which two major ADC types Dewesoft has selected, and why
Are you ready to get started? Let’s go!
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What is A/D Converter (ADC)?
The Analog-to-Digital Converter (ADC) is one of the fundamental building blocks of modern data acquisition systems (aka DAQ or DAS systems). These systems are comprised of the following basic components:
- Sensors (see What Is A Sensor guide?)
- Signal Conditioning (see What Is A Signal Conditioner guide?)
- Analog-to-Digital Converter (ADC) (this article)
- And some sort of computer with DAQ software for signal logging and analysis.
ADC converters play a big role in the modern digital data acquisition systems
What Do A/D Converters Do?
The main purpose of the A/D converters within a data acquisition system is to convert conditioned analog signals into a stream of digital data so that the data acquisition system can process them for display, storage, and analysis.
ADC converter takes an analog signal and converts it into the digital domain
Main Types of A/D Converters
Although there are really five major types of ADCs today, in the modern DAQ world, it really comes down to two of them:
- successive approximation and
The other types are perfectly fine but are better suited to non-DAQ applications. For example, dual-slope ADCs are quite slow and are thus found mostly in handheld voltmeters.
And then there are flash ADCs that offer extremely high sample rates but amplitude axis resolution that is too low for DAQ applications. Pipeline converter ADCs is an approach that uses multiple flash converters to enhance amplitude axis resolution but they are still limited in that area.
Comparison of major ADC Types
|ADC Type||Pros||Cons||Max Resolution||Max Sample Rate|
|Dual Slope||Inexpensive||Low speed||20 bits||100 Hz|
|Flash||Very fast||Low bit resolution||12 bits||10 GHz|
|Pipeline||Very fast||Limited resolution||16 bits||1 GHz|
|SAR||Good speed/resolution ratio||No inherent anti-aliasing protection||18 bits||10 MHz|
|Delta-sigma (ΔΣ)||High dynamic performance, inherent anti-aliasing protection||Hysteresis on unnatural signals||32 bits||1 MHz|
So again, the DAQ world has settled on SAR (successive approximation) ADCs and delta-sigma (ΔΣ) ADCs. Each has its own advantages and disadvantages and thus suitability for certain applications. Bellow, we will look at how each ADC works and compare them.
Read more about different types of ADC converters:
Successive Approximation ADCs (SAR)
The “bread and butter” ADC of the DAQ world is the SAR analog-to-digital converter. It offers an excellent balance of speed and resolution and handles a wide variety of signals with excellent fidelity.
It’s been around for a long time, therefore SAR designs are stable and reliable, and the chips are relatively inexpensive. They can be configured for both low-end A/D cards, where a single ADC chip is “shared” by multiple input channels (multiplexed A/D boards), or in configurations where each input channel has its own ADC for true simultaneous sampling.
Typical SAR block diagram
The analog input of most ADCs is 5V, which is why nearly all signal conditioning front-ends provide a conditioned output that is the same. The typical SAR ADC uses a sample-and-hold circuit that takes in the conditioned analog voltage from the signal conditioning front-end.
An onboard DAC creates an analog reference voltage equal to the digital code output of the sample and holds a circuit. Both of these are fed into a comparator which sends the result of the comparison to the SAR. This process continues for “n” successive times, with “n” being the bit resolution of the ADC itself, until the closest value to the actual signal is found.
SAR ADCs do not have any inherent anti-aliasing filtering (AAF), so unless this is added before the ADC by the DAQ system, if the engineer selects too low of a sample rate, false signals (aka “aliases”) will be digitized by the SAR ADC. Aliasing is particularly problematic because it is impossible to correct it after digitization.
There is no way to fix it with software. It must be prevented either by always sampling faster than the Nyquist frequency of all input signals or by filtering the signals before and within the ADC.
For more details see Aliasing and the Danger of Under-sampling below
SAR ADCs are a solid choice for many DAQ systems in use today. These are widely used at the low-end of the market since they can be used in a multiplexed fashion where multiple channels are sampled with one ADC. But they are also widely used in the middle of the market due to their speed and good amplitude axis resolution.
Because of their limited amplitude axis resolution, they are not well-suited for high dynamic applications such as noise, audio, shock and vibration, balancing, sine processing, etc. For those applications, engineers should turn to delta-sigma ADCs, as discussed in the next section.
Delta-sigma ADCs (ΔΣ)
A newer ADC design is the delta-sigma ADC, which takes advantage of DSP technology in order to improve amplitude axis resolution and reduce the high-frequency quantization noise inherent in SAR designs.
The complex and powerful design of delta-sigma ADCs makes them ideal for dynamic applications that require as much amplitude axis resolution as possible. This is why they are commonly found in audio, sound and vibration, and a wide range of high-end data acquisition applications.
Typical Delta-Sigma ADC block diagram
The implementation of these chips for data acquisition applications usually involves a heavy concentration on front-end anti-aliasing filtering (AAF), making it virtually impossible to digitize false signals.
A low-pass filter implemented in a DSP eliminates virtually quantization noise, resulting in excellent signal-to-noise performance.
Delta-sigma ADCs work by over-sampling the signals far higher than the selected sample rate. The DSP then creates a high-resolution data stream from this over-sampled data at the rate that the user has selected. This over-sampling can be up to hundreds of times higher than the selected sample rate. This approach creates a very high-resolution data stream (24-bits is common) and has the advantage of allowing multistage anti-aliasing filtering (AAF), making it virtually impossible to digitize false signals.
Dual Delta-sigma ADCs - DualCoreADC®
Dewesoft has further taken advantage of these ADCs by combining two of them on each input channel. One ADC is set to a low gain and the other is set to a higher gain. Both ADCs monitor the signal at the same time, and a proprietary circuit compares them in real-time and uses the one with the best signal-to-noise ratio at any moment in time, merging the parallel digital signals into a seamless single stream with greatly enhanced dynamic range.
Dewesoft's DualCoreADC diagram
This technique greatly enhances the dynamic range that would be otherwise impossible to reach with a single ADC. It increases the dynamic range to as much as 160 dB. Dewesoft has patented this technology, which is called DualCoreADC on the market.
Dewesoft's DualCoreADC video
It is interesting to point out that even with very slow signals like from most thermocouples, that the greatest possible amplitude axis resolution makes these delta-sigma ADCs preferable to SAR ADCs.
Imagine a thermocouple capable of measuring across a 1500° span - the more amplitude axis you have at the ADC, the more resolution the temperature signal will have. Keep in mind that each bit effectively doubles the vertical axis resolution.
Which Is Better? SAR or Delta-Sigma?
Each ADC technology has its place. And because applications are so different, it is impossible to say one is better than another overall. However, it is absolutely possible to say one of them is better than another with respect to one or more of today’s applications requirements:
|Criterion||SAR ADCs||Sigma-Delta (ΔΣ) ADCs|
|When the best amplitude axis resolution is needed (even for slow signals like thermocouples!).||Normally 16 or 18 bits maximum.||Better choice. 24-bit is the de facto standard among ΔΣ cards today.|
|When an inexpensive multiplexed AD card must be used.||
Only choice. It’s possible to MUX a single SAR ADC for multiple channels to create inexpensive DAQ systems when small-time skew errors are not an issue.
|When the highest possible sample rate is required.||
Better choice. There are SAR ADCs for data acquisition with up to 10 MS/s sampling.
|On-board DSP processing limits the top sample rate of ΔΣ ADCs compared to SAR ADCs.|
|When AAF (anti-aliasing filtering) is desired.||Expensive and complex to add to SAR ADCs.||A better choice, since AAF is inherent to ΔΣ ADCs.|
|When the highest signal-to-noise ratio is needed.||The only choice. Possible to achieve up to 160dB with Dewesoft’s proprietary DualCoreADC® technology.|
|When mostly unnatural signals will be recorded (such as square waves).||Better at representing square waves.|
Read more about different types of ADC converters:
The Right Tool For the Job
Although Dewesoft is famous for using 24-bit sigma-delta ADCs and has innovated greatly with DualCoreADC technology, they also use 16-bit SAR ADCs in order to achieve 1 MS/s maximum sample rate in the SIRIUS DAQ systems product line.
These are the SIRIUS HS (high speed) signal conditioners that are available within that line. The standard and HD series signal conditioners utilize 24-bit sigma-delta ADC cards.
SIRIUS HS signal conditioners implement powerful AAF filtering in the form of 5th order 100 kHz anti-aliasing filtering. There is an additional filter in the digital domain selectable among Bessel, Butterworth (or bypass), up to the 8th order.
Powerful anti-aliasing filtering is built into all 24-bit ADC signal conditioners from Dewesoft.
Check out Dewesoft's data acquisition systems with high-end signal conditioning
Multiplexed or Single ADC per Channel
Very often in lower-end DAQ systems, such as data loggers or industrial control systems, multiplexed A/D cards are used, because they are less expensive than A/D cards which have a separate ADC chip per input channel.
In a multiplexed ADC system, a single analog-to-digital converter is used to convert multiple signals from analog to digital domain. This is done by multiplexing the analog signals one at a time into the ADC.
This is a lower-cost approach but it is not possible to precisely align the signals on the time axis, because only one signal can ever be converted at a time. Therefore, there is always a time skew between channels. If a small-time skew error is irrelevant in a given application, then it is not necessarily a bad thing. The same goes for the analog devices used within the system - choosing the best fit for the application in terms of form, fit, function and avoiding obsolescence are driving factors.
In addition, since the maximum sample rate is always divided by the number of channels being sampled, the top sample rate per channel is usually lower in multiplexed systems, except in cases where only one or a few channels are being sampled.
In today’s data acquisition systems, multiplexed ADC systems are employed primarily by low-end DAQ systems, where cost is more important than precision or speed.
What is the Sampling Rate?
The rate at which the signals are converted is called the sample rate. Certain applications, such as most temperature measurements, do not require a high rate since the signals do not change very rapidly.
However, AC voltages and currents, shock and vibration, and many other applications require sample rates in the tens or hundreds of thousands of samples per second or more. The sample rate is usually referred to as the T (or X) axis of measurement.
Analog signal as sampled by the A/D converter
Dewesoft offers DAQ systems with maximum sample rates, as shown here:
|Model||Variant||Interface||Max. Sample Rate (per channel)|
|SIRIUS||Dual Core||USB||200 kS/s|
|SIRIUS MINI||Dual Core||USB||200 kS/s|
|SIRIUS||Dual Core||EtherCAT||20 kS/s|
|SIRIUS||HD (high density)||USB||200 kS/s|
|SIRIUS||HD (high density)||EtherCAT||10 kS/s|
|SIRIUS||HS (high speed)||USB||1 MS/s|
|KRYPTON||One channel||EtherCAT||40 kS/s|
Aliasing and the Danger of Under-sampling
Understanding your signals and their highest possible frequencies is an important part of getting accurate measurements. For example, let’s say that we want to measure the output of an accelerometer.
If we expect it to experience vibrations with a maximum frequency of 100 Hz, we must set the sample rate to at least double that (the Nyquist frequency), but in practice ten times oversampling is better in order to get a good quality representation of the signal shape. So in this example, we set the sample rate to 1000 Hz and do the measurement.
Theoretically, everything should be fine, but how do we know that the signal didn’t really go much higher in frequency at a considerable amplitude? If it did, then our system would not accurately measure or convert the signal. And, in fact, if this is taken to an extreme, the measured values could even be completely wrong.
To understand aliasing, watch an old movie where a camera was filming at 24 frames per second as a wagon rolled by - at various speeds it can look like the wheels are spinning backward, or even not moving at all.
This is a kind of stroboscopic visual effect caused by the harmonic relationship between the rotational frequency of the wheel versus the picture-taking rate of the camera. Perhaps you’ve seen videos where a camera’s shutter speed was synchronized with a helicopter’s blades, where it appears that the helicopter is hanging in the air, it’s blades not moving at all.
In the case of a movie or an entertaining video it does not matter, but when making a scientific measurement, if we really believe that the wheels of a car are spinning backward, or that a helicopter’s blades are not moving, when in fact they are going quite fast, we have a real-world measurement problem.
In terms of digitizing voltage signals with our ADC, it is important that the sample rate is set appropriately. If we set it too high, we waste processing power and end up with data files that are unnecessarily large and unwieldy. But if we set it too low, we could have two problems:
- Missing vital dynamic signal components
- Ending up with false (“alias”) signals (if the system lacks anti-aliasing filtering)
Demonstration of a false signal (alias) in black, caused by sampling too infrequently compared to the original signal.
Dewesoft products prevent aliasing from happening by using 24-bit ADCs that have anti-aliasing filters (AAF) built into them. These filters work in several stages, including one stage that adjusts automatically to the Nyquist frequency (usually about 40%) of the selected sample rate. So even if you select too low of a sample rate, false or “alias” signals cannot ruin the measurement.
What is Bit Resolution and Why Does It Matter?
In the early days of data acquisition, 8-bit ADCs were common. As of this writing, in the world of DAQ systems, 24-bit ADCs are standard among most data acquisition systems designed to make dynamic measurements, and 16-bit ADCs are commonly considered the minimum resolution for signals in general. There are some low-end systems utilizing 12-bit ADCs.
Because each bit of resolution effectively doubles the possible resolution, systems with 24-bit ADCs provide 2^24 = 16,777,216. Thus, an incoming one-volt signal can be divided into more than 16 million steps on the Y-axis.
16,777,216 steps for a 24-bit ADC is dramatically better than the maximum theoretical 65,656 steps of a 16-bit ADC. Thus the appearance of waveshapes is accordingly more accurate and has a lot more precision, the more resolution you have. This applies to the time axis, too.
24-bit resolution (red) vs. 16-bit resolution (gray)
DualCoreADC® Technology and Why It Matters
On the amplitude axis, one challenge that engineers have faced for years is the dynamic range. For example: what if we have a signal that is usually less than 5 volts, but at times can range upward dramatically? If we set the resolution of the ADC to accommodate the 0-5V data, the system will be totally overloaded when the signal rises past that.
One solution would be to use two channels set to different gains and refer to one of them for the 0-5V data, and to the other one for the higher amplitude data. But this is very inefficient - we can’t possibly use two channels for every input signal - we would need twice as many DAQ systems in order to do the same work. In addition, it would make data analysis after each test much more complex and time-consuming.
Dewesoft’s DualCoreADC® technology solves this problem by using two separate 24-bit ADCs per channel, and automatically switching between them in real-time and creating a single, seamless channel. These two ADCs always measure the high and low gain of the input signal. This results in the full possible measuring range of the sensor and prevents the signal from being clipped.
Video explaining Dewesoft's DualCoreADC technology
With DualCoreADC® technology SIRIUS DAQ systems achieve more than 130 dB signal to noise ratio and more than 160 dB in dynamic range. This is 20 times better than typical 24-bit systems with 20 times less noise.
The choice of which ADC technology to employ should always be based on application requirements. If you are measuring primarily static and quasi-static (slow) signals, you obviously don’t need a super-high-speed system, but you probably want one with as much amplitude axis resolution as possible.
Fixed systems used in the industry typically have requirements that do not change much, and it’s usually easier to choose a system.
For everyday DAQ systems, however, it’s a bit more challenging since these systems are used in a variety of applications over time. The key is to select one which has the best overall performance and protections against noise, aliasing, and obsolescence.
Check out Dewesoft's data acquisition systems with high-end signal conditioning